1. Field
A thin film transistor array substrate and a fabricating method thereof are provided.
2. Related Art
A display device is desired as a visual information communicating media in information society. Various flat panel display devices have been developed that are reduced in weight and bulk. These devices have generally replaced the cathode ray tube. Conventionally, the cathode ray tube is large in size and bulky.
Such flat panel display devices include, for example, a liquid crystal display device (LCD), a field emission display (FED), a plasma display panel (PDP) and an electro-luminescence (EL), etc.
The liquid crystal display device satisfies a thin-thickness and a light-weight trend and improves productivity to rapidly replace the cathode ray tube in many application fields.
Particularly, a liquid crystal display device of an active matrix type that drives a liquid crystal cell using a thin film transistor (hereinafter, TFT) has an advantage of a high picture quality and a small power. There has been rapid development toward a scale-up and a high-resolution device due to a mass production technique security and the result of research and development.
A method of fabricating a liquid crystal display device of the active matrix type is classified into, for example, a substrate cleaning, a substrate patterning process, an alignment forming/rubbing process, a substrate joining/liquid crystal injecting process, a packing process, an inspecting process, and a repairing process.
The substrate cleaning process removes an impurity contaminated on a substrate surface of the liquid crystal display device using a cleaning solution.
The substrate patterning process is divided into a patterning of an upper substrate (a color filter array substrate) and a patterning of a lower substrate (a TFT-array substrate). A color filter, a common electrode and a black matrix, are formed on the upper substrate. A signal wiring such as a data line and a gate line is formed on the lower substrate. The TFT is formed at an intersection area of the data line and the gate line. A pixel electrode connected to the TFT is formed at a pixel area between the data line and the gate line.
In the alignment forming/rubbing process, an alignment film is coated on each upper substrate and lower substrate, and the alignment film is rubbed by a rubbing patch.
In the substrate joining/liquid crystal injecting process, the upper substrate and the lower substrate are joined to each other by a sealant, and a liquid crystal and a spacer are injected through a liquid crystal injection port. The liquid crystal injection port is sealed.
In the packing process of a liquid crystal display panel, a tape carrier package (hereinafter, TCP) packed an integrated circuit a gate drive integrated circuit and a data drive integrated circuit is connected to a pad portion on the substrate. The drive integrated circuit can be directly packed on the substrate by a Tape Automated Bonding type using the above-mentioned TCP and a Chip On Glass (hereinafter, COG) type.
The inspecting process includes an electric lightning inspection processed after a variety of signal wirings and a pixel electrode is formed on the lower substrate, and a quality inspection of each pixel.
The repairing process operates a restoration about a substrate proved such that a repairing is enabled by the inspecting process. A low-quality substrate that is non-repaired in the inspecting process is disposed.
FIG. 1 is a diagram that explains a lighting inspection using a short bar of a related art thin film transistor substrate.
Referring to FIG. 1, a thin film transistor substrate 30 includes a display area 10 with a liquid crystal cell arranged in a matrix type, and a non-display area 20 that includes the area other than the display area 10.
The display area 10 of the thin film transistor substrate 30 is comprised of gate lines supplied with a gate signal from a gate pad 22. Data lines are supplied with a data signal from a data pad 25. A thin film transistor switches the liquid crystal cell at the intersection of the gate lines and the data lines. A pixel electrode is connected to the thin film transistor to drive the liquid crystal cell. A lower alignment film is coated thereon in order to align the liquid crystal.
The non-display area 20 of the thin film transistor substrate 30a comprises a gate pad 22 that applies a gate signal. Gate shorting bar 24 is commonly connected to a gate shorting line 23 consisted of an odd and even shorting line 23a and 23b extended from the gate pad 22. A data pad 25 applies a gate signal and a data shorting bar 27 is commonly connected to a data shorting line 26 that consist of odd and even shorting lines 26a and 26b that extend from the data pad 25.
The gate shorting bar 24 and the data shorting bar 27 are positioned at the non-display area 20 of the thin film transistor substrate 30 that is used upon lighting inspecting (or “on-off inspection) of the liquid crystal cell after the liquid crystal display panel is completed.
Referring to a dotted line area A shown in FIG. 2, in the gate shorting bar 24 formed on a related art thin film transistor substrate, the odd and the even shorting line 23a and 23b are commonly connected to the gate shorting bar 24.
In other words, since the same inspection signal is applied via the gate shorting bar 24 formed on the thin film transistor substrate, then a possibility of shorting the gate line can not be inspected. After the liquid crystal display panel is finally completed, the inspection signal is applied to each gate pad 22 using a separate auto-probe means to inspect the quality.
Accordingly, since the quality is inspected by a separate auto-probe inspecting process after the liquid crystal display panel is finally completed, the cost is increased, and the process used to inspect the gate line consisting of a related art thin film transistor substrate is complicated.